发明名称 TESTABLE CIRCUIT WITH INPUT/OUTPUT CELL FOR STANDARD CELL LIBRARY
摘要 A testable circuit includes a first function logic, an input output cell including an input/output unit and a first control multiplexer; and a first testing block is provided, wherein the input/output unit has at least a connection terminal. The first control multiplexer has an output port coupled to the connection terminal, a first input port coupled to the first functional logic, and a second input port. The first testing block is coupled between the first functional logic and the second input port, wherein when the testable circuit is under a testing mode, the first control multiplexer couples the second input port to the output port; and when the testable circuit is under a normal mode, the first control multiplexer couples the first input port to the output port.
申请公布号 US2011010596(A1) 申请公布日期 2011.01.13
申请号 US20090500588 申请日期 2009.07.09
申请人 YANG TAO-YEN;HUANG KUN-CHIN 发明人 YANG TAO-YEN;HUANG KUN-CHIN
分类号 G01R31/3177;G06F11/25 主分类号 G01R31/3177
代理机构 代理人
主权项
地址