TEST METHOD AND TEST DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a test method of a circuit suitable for performing a test of reduced incorrect determination.SOLUTION: This test method includes a process where voltage and a test signal are supplied in parallel to a plurality of circuits to be tested and a unit test is repeated a plurality of times. In this process, the unit test is repeated while the test signal pattern is changed so that the test signal input into each circuit to be tested for one unit test includes a test signal of at least a first test item and the timing when the test signal of the first test item is input into each circuit to be tested changes between the test signal pattern in the unit test of a certain time and the test signal pattern in the unit test of the subsequent time. The test method further includes a process of selecting the test signal pattern of the time having small voltage noise based on the unit test performed a plurality of times while the test signal pattern is changed.