MULTI-PHASE PARALLED CONVERTER AND CONTROLLNG METHOD THEREFOR

摘要

A multi-phase parallel converter can include: sampling circuits corresponding to power stage circuits to form a plurality of phases of the multi-phase parallel converter, where each sampling circuit samples an inductor current of a corresponding power stage circuit, and generates a sense signal; a current-sharing circuit that generates a current-sharing control signal according to a superimposed signal that is generated by adding the sense signal to a bias voltage signal; switching control circuits corresponding to the power stage circuits, where each switching control circuit receives the current-sharing control signal, and controls a switching operation of a corresponding power stage circuit; and a bias voltage generator that generates the bias voltage signal to gradually increase/decrease when a selected phase is to be disabled/enabled.

主权项

1. A multi-phase parallel converter, comprising:
a) a plurality of sampling circuits corresponding to a plurality of power stage circuits to form a plurality of phases of said multi-phase parallel converter, wherein each of said plurality of sampling circuits is configured to sample an inductor current of a corresponding of said plurality of power stage circuits, and to generate a sense signal; b) a current-sharing circuit configured to generate a current-sharing control signal according to a superimposed signal, wherein said superimposed signal is generated by adding said sense signal to a bias voltage signal; c) a plurality of switching control circuits corresponding to said plurality of power stage circuits, wherein each of said plurality of switching control circuits is configured to receive said current-sharing control signal, and to control a switching operation of a corresponding of said plurality of power stage circuits; and d) a bias voltage generator configured to generate said bias voltage signal to gradually increase when a selected of said plurality of phases is to be disabled such that an output current of said selected phase is decreased to zero, and to generate said bias voltage signal to gradually decrease when said selected phase is to be enabled such that said output current of said selected phase is equal to output currents of remaining of said plurality of phases.