| 摘要 |
A memory interface control circuit includes an input/output circuit 10 which transmits and receives a data strobe signal DQS to and from a memory, a read control circuit 20 which determines that the data strobe signal DQS associated with a memory read, received from the input/output circuit has repeated a predetermined number of times of transitions based on information on the number of data reads and sets a mask signal MS to a mask state, and a write control circuit 30 which controls a transmission timing of outputting the data strobe signal DQS associated with a memory write from the input/output circuit 10 based on a temporal positional relationship between a data strobe output request signal DQOEN associated with the memory write and the mask signal MS.
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