发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND WRITING METHOD OF THE SAME
摘要 PROBLEM TO BE SOLVED: To improve program disturbance due to fineness, in a multi-level flash memory of an AND type in which QPW operation can be performed.SOLUTION: For example, at QPW operation, a corresponding bit line BL is biased, until a threshold value of a selection memory cell MC reaches to a verify-low-level by a plurality of sense amplifiers 201 provided corresponding to a plurality of bit lines BL; the corresponding bit line BL is biased to higher voltage than voltage VSS, when the threshold of the selection memory cell MC reaches a verify-low-level, when the threshold of the selection memory cell MC reaches to the verify-low-level; the corresponding bit line BL is continued to bias to further higher voltage VDDSA than voltage Vb; and bit lines BL corresponding to non-selection memory cells other than the selection memory cell Mc are continued to bias to voltage VDDSA.
申请公布号 JP2011008838(A) 申请公布日期 2011.01.13
申请号 JP20090148870 申请日期 2009.06.23
申请人 TOSHIBA CORP 发明人 SUZUKI HIRONARI;TANAKA RIEKO
分类号 G11C16/02;G11C16/04;G11C16/06 主分类号 G11C16/02
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