发明名称 Method for manufacturing a wafer level package
摘要 A method for manufacturing a wafer level package of an integrated circuit element for direct attachment to a wiring board is disclosed. An integrated circuit element includes input/output pads located on an active side. A non-conductive support structure is formed on the active side of the integrated circuit element in an area that is free from input/output pads. A conductive path is formed upon the support structure and a non-conductive coating is formed on over the active side of the integrated circuit element such that a surface is formed which leaves interface pads accessible.
申请公布号 US7867817(B2) 申请公布日期 2011.01.11
申请号 US20080023853 申请日期 2008.01.31
申请人 QIMONDA AG 发明人 DOBRITZ STEPHAN;HEDLER HARRY;MIETH HENNING
分类号 H01L21/00 主分类号 H01L21/00
代理机构 代理人
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