发明名称 METHOD FOR MANUFACTURING BURIED GATE USING PRE LANDING PLUG
摘要 <p>PURPOSE: A buried gate manufacturing method is provided to reduce contact resistance by increasing a contact area between a bit line contact/storage node contact and a substrate. CONSTITUTION: A plug conductive layer is formed in the front side of a substrate(71). A landing plug(74A) is formed by etching the plug conductive layer. A trench(78) is formed by etching a substrate between the landing plugs. A gate insulating layer is formed on the surface of the trench. A buried gate(80A), which partly fills the trench, is formed on the gate insulating layer.</p>
申请公布号 KR20110003220(A) 申请公布日期 2011.01.11
申请号 KR20090060879 申请日期 2009.07.03
申请人 HYNIX SEMICONDUCTOR INC. 发明人 SHIN, JONG HAN;PARK, JUM YONG
分类号 H01L21/336;H01L21/768;H01L29/78 主分类号 H01L21/336
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