发明名称 Method for forming self-aligned source and drain contacts using a selectively passivated metal gate
摘要 A transistor structure includes a semiconductor substrate with a first surface, a diffusion region at the first surface of the substrate, a sacrificial gate formed on the diffusion region, and insulating side walls formed adjacent to the sacrificial gate. A metal gate is formed by etching out the sacrificial gate and filling in the space between the insulating side walls with gate metals. Silicided source and drain contacts are formed over the diffusion region between the side walls of two adjacent aluminum gates. One or more oxide layers are formed over the substrate. Vias are formed in the oxide layers by plasma etching to expose the silicided source and drain contacts, which simultaneously oxidizes the aluminum gate metal. A first metal is selectively formed over the silicided contact by electroless deposition, but does not deposit on the oxidized aluminum gate.
申请公布号 US7867863(B2) 申请公布日期 2011.01.11
申请号 US20080138038 申请日期 2008.06.12
申请人 INTEL CORPORATION 发明人 CHANG PETER
分类号 H01L21/336 主分类号 H01L21/336
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