| 摘要 |
A frequency generator (100) takes a signal source (clock or carrier) (101) and generates a edge encoded direct digital modulated differential output signal (110). The differential signal (110) is applied to a frequency extension quadrature generator (FEQG) (112). The FEQG (112) includes a fractional differential wavelength delay locked loop (DLL) (280) and a frequency multiplier (240). The DLL (280) generates a control voltage (214) with which to control delays of the edge encoded modulation signal (110). A frequency extended quadrature function is applied to the periodic steady state input signal with edge encoded modulation (110), to provide the output signal set 113.
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