MEMORY SYSTEM HAVING NAND-BASED NOR AND NAND FLASHES AND SRAM INTEGRATED IN ONE CHIP FOR HYBRID DATA, CODE AND CACHE STORAGE

摘要

A memory includes a NAND flash memory, a NOR flash memory and a SRAM manufactured on a single chip Both NAND and NOR memones are manufactured by the same NAND manufactupng process The three memories share the same address bus, data bus, and pins of the single chip The address bus is bi-directional for receiving codes, data and addresses and transmitting output The data bus is also bi-directional for receiving and transmitting data One external chip enable pin and one external output enable pin are shared by the three memones to reduce the number of pins required for the single chip Both NAND and NOR memones have dual read page buffers and dual write page buffers for Read-While-Load and Wpte-While-Program operations to accelerate the read and wpte operations respectively A memory-mapped method is used to select different memones, status registers and dual read or write page buffers