SYSTEMS AND METHODS FOR DYNAMIC POWER SAVINGS IN ELECTRONIC MEMORY OPERATION

摘要

Power reduction is accomplished in an electronic memory by segmenting portions of the memory and only enabling certain memory portions depending upon where the memory is to be accessed. In one embodiment, bit lines and/or word lines are segmented using latch repeaters to control address selection with respect to single-bit and/or single-word segments beyond a first single-bit and/or single-word segment. The latch repeaters are, in one embodiment, allowed to remain in their operated/non-operated state at the completion of a memory read/write cycle. This then avoids successive enabling pulses when the same segment is accessed on successive cycles.