发明名称 OVERLAY VERNIER AND METHOD FOR FORMING THE SAME
摘要 <p>PURPOSE: An overlay vernier and a forming method thereof are provided to efficiently read an overlay by preventing an overlay reading error by preventing the width of the vernier from widening after a slim/etch process which is repeated several times by forming an overlay vernier with a mesa structure. CONSTITUTION: A polygonal main vernier has a plurality of laminated sub layers to form a step shape on both sides. A polygonal sub vernier is formed in the inner side of the main vernier. The main vernier has a polygonal frame type. A first oxide/poly layer(420) has the same width as a photosensitive pattern(410).</p>
申请公布号 KR20110001690(A) 申请公布日期 2011.01.06
申请号 KR20090059350 申请日期 2009.06.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KOO, SUN YOUNG;LIM, CHANG MOON
分类号 H01L21/027 主分类号 H01L21/027
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