发明名称 METHOD FOR FORMING MULTILAYER WIRING
摘要 PROBLEM TO BE SOLVED: To provide a method for manufacturing a multilayer wiring, capable of preventing increase in the number of processes and moreover, having less possibility of causing damages to a wiring which uses copper.SOLUTION: The manufacturing method includes the steps of: forming an etching stop layer 5 on a lower layer wiring 3 containing copper; forming an interlayer insulating film 6 on the etching stop layer 5; forming an opened hole 7 reaching the etching stop layer 5 on the interlayer insulating film 6; forming a manganese oxide film 8 on the interlayer insulating film 6; removing the etching stop layer 5 formed on the lower layer wiring 3 while leaving the manganese oxide film 8, on the surface of the interlayer insulating film 6 exposed through the opened hole 7; and making the lower layer wiring 3 expose on the bottom of the opened hole 7 and forming an upper layer wiring on the lower layer wiring 3 exposed on the bottom of the opened hole 7.
申请公布号 JP2011003687(A) 申请公布日期 2011.01.06
申请号 JP20090144944 申请日期 2009.06.18
申请人 TOKYO ELECTRON LTD 发明人 MIYOSHI SHUSUKE
分类号 H01L21/768;H01L21/3205;H01L23/52 主分类号 H01L21/768
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