METHODS AND STRUCTURES FOR A VERTICAL PILLAR INTERCONNECT
摘要
In wafer-level chip-scale packaging and flip-chip packaging and assemblies, a solder cap is formed on a vertical pillar. In one embodiment, the vertical pillar overlies a semiconductor substrate. A solder paste, which may be doped with at least one trace element, is applied on a top surface of the pillar structure. A reflow process is performed after applying the solder paste to provide the solder cap.
申请公布号
WO2011002778(A2)
申请公布日期
2011.01.06
申请号
WO2010US40410
申请日期
2010.06.29
申请人
FLIPCHIP INTERNATIONAL, LLC;BURGESS, GUY F.;CURTIS, ANTHONY;JOHNSON, MICHAEL E;STOUT, GENE;TESSIER, THEODORE G.
发明人
BURGESS, GUY F.;CURTIS, ANTHONY;JOHNSON, MICHAEL E;STOUT, GENE;TESSIER, THEODORE G.