Direct contact between high-κ/metal gate and wiring process flow

摘要

A low resistance contact is formed to a metal gate or a transistor including a High-&kgr; gate dielectric in a high integration density integrated circuit by applying a liner over a gate stack, applying a fill material between the gate stacks, planarizing the fill material to support high-resolution lithography, etching the fill material and the liner selectively to each other to form vias and filling the vias with a metal, metal alloy or conductive metal compound such as titanium nitride.