发明名称 |
Reading and writing a memory element within a programmable processing element in a plurality of modes |
摘要 |
An integrated circuit in communication with a host circuit includes an interconnect bus and a plurality of programmable elements. Each of the programmable elements includes a control interface for receiving a control signal, the control signal causing the memory element to selectively operate in one of a plurality of modes. In a first mode, the memory element communicates stored data to the output port upon receiving the control signal; in a second mode the memory element communicates stored data to the output port upon detecting valid data at the input port; in a third mode the memory element stores a first data value consisting of at least a portion of a single data word received at the input port; and in a fourth mode the memory element stores a second data value consisting of at least a portion of each of two separate input values received at the input port. Each programmable element may write data to and read data from a memory element of any of the other programmable elements.
|
申请公布号 |
US7865695(B2) |
申请公布日期 |
2011.01.04 |
申请号 |
US20070737614 |
申请日期 |
2007.04.19 |
申请人 |
L3 COMMUNICATIONS INTEGRATED SYSTEMS, L.P. |
发明人 |
YANCEY JERRY WILLIAM;KUO YEA ZONG |
分类号 |
G06F15/76 |
主分类号 |
G06F15/76 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|