发明名称 Integrated Pipeline Write Hazard Handling Using Memory Attributes
摘要 A system and method for write hazard handling are described, including a method comprising pre-computing a memory management unit policy for a write request using an address that is at least one clock cycle before data; registering the pre-computed memory management unit policy; using the pre-computed memory management unit policy to control a pipeline stall to ensure that non-bufferable writes are pipeline-protected, ensuring that no non-bufferable locations are bypassed from within the pipeline and all subsequent non-bufferable reads will get data from a final destination; bypassing a read request only after a corresponding write request is updated an write pending buffer; decoding the write request with the write request aligned to data; registering the write request in the write pending buffer; allowing arbitration logic to force the pipeline stall for a region that will have a write conflict; and stalling read requests to protect against write hazards.
申请公布号 US2010332757(A1) 申请公布日期 2010.12.30
申请号 US20090495790 申请日期 2009.06.30
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 NYCHKA ROBERT;KARNAMADAKALA PRASHANTH;ACHARYA NILESH
分类号 G06F12/08;G06F12/00 主分类号 G06F12/08
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