发明名称 TECHNIQUE FOR EXPOSING A PLACEHOLDER MATERIAL IN A REPLACEMENT GATE APPROACH BY MODIFYING A REMOVAL RATE OF STRESSED DIELECTRIC OVERLAYERS
摘要 In a replacement gate approach, the sacrificial gate material is exposed on the basis of enhanced process uniformity, for instance during a wet chemical etch step or a CMP process, by forming a modified portion in the interlayer dielectric material by ion implantation. Consequently, the damaged portion may be removed with an increased removal rate while avoiding the creation of polymer contaminants when applying an etch process or avoiding over-polish time when applying a CMP process.
申请公布号 US2010330790(A1) 申请公布日期 2010.12.30
申请号 US20100822789 申请日期 2010.06.24
申请人 HEMPEL KLAUS;PRESS PATRICK;SCHROEDER VIVIEN;REIMER BERTHOLD;GROSCHOPF JOHANNES 发明人 HEMPEL KLAUS;PRESS PATRICK;SCHROEDER VIVIEN;REIMER BERTHOLD;GROSCHOPF JOHANNES
分类号 H01L21/8238 主分类号 H01L21/8238
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