| 摘要 |
An embodiment discloses a flash memory controller comprising a flash memory interface controller, a host interface controller, a random-access memory (RAM) interface controller, an ECC encoder, an ECC divider, an ECC constructor and an ECC decoder. The flash memory interface controller is configured to store information data, ECC segments, and linked-lists to a flash memory and read information data, ECC segments, and the linked-lists from the flash memory. The host interface controller is configured to forward information data to a host and to receive information data from the host. The RAM interface controller is configured to store the linked-lists to a RAM device and read the linked-lists from the RAM device. The ECC encoder is configured to receive a write information datum from the host interface controller and generate an ECC datum, of which the length is variable, in response to the write information datum to be stored in the flash memory when operated in a write mode. The ECC divider is configured to divide the generated ECC datum into a plurality of ECC segments according to the length of the generated ECC datum and forward the divided ECC segments to the flash memory interface controller when operated in a write mode. The ECC constructor is configured to receive a plurality of ECC segments from the flash memory interface controller and construct an ECC datum by combining the received ECC segments for a read information datum received from the flash memory when operated in a read mode. The ECC decoder is configured to correct errors of the read information datum based on the read information datum and the constructed ECC datum and forward the corrected read information datum to the host interface controller when operated in a read mode. In addition, the link relation of the ECC segments in the flash memory is indicated by the linked-lists.
|
