发明名称 SEMICONDUCTOR MEMORY DEVICE INCLUDING MULTI-LAYER GATE STRUCTURE
摘要 A semiconductor memory device includes a first select transistor, first stepped portion, and a first contact plug. The first select transistor is formed on a side of an upper surface of a substrate and has a first multi-layer gate. The first stepped portion is formed by etching the substrate adjacent to the first multi-layer gate of the first select transistor such that the first stepped portion forms a cavity in the upper surface of the substrate. The first contact plug is formed in the first stepped portion.
申请公布号 US2010327338(A1) 申请公布日期 2010.12.30
申请号 US20100881747 申请日期 2010.09.14
申请人 发明人 YAEGASHI TOSHITAKE
分类号 H01L29/78;H01L21/8247;H01L23/48;H01L23/52;H01L27/108;H01L27/115;H01L27/148 主分类号 H01L29/78
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