发明名称 |
METHOD AND SYSTEM FOR MANAGING A NAND FLASH MEMORY |
摘要 |
A method and system to facilitate paging of one or more segments of a logical-to-physical (LTP) address mapping structure to a non-volatile memory. The LTP address mapping structure is part of an indirection system map associated with the non-volatile memory in one embodiment of the invention. By allowing one or more segments of the LTP address mapping structure to be paged to the non-volatile memory, the amount of volatile memory required to store the LTP address mapping structure is reduced while maintaining the benefits of the LTP address mapping structure in one embodiment of the invention.
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申请公布号 |
US2010332730(A1) |
申请公布日期 |
2010.12.30 |
申请号 |
US20090495573 |
申请日期 |
2009.06.30 |
申请人 |
ROYER JR ROBERT J;FABER ROBERT;CHARTRAND BRENT |
发明人 |
ROYER, JR. ROBERT J.;FABER ROBERT;CHARTRAND BRENT |
分类号 |
G06F12/00;G06F12/02 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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