发明名称 METHOD FOR SELECTING CLOCK SOURCE IN SYNCHRONIZATION DIGITAL HIERARCHY NETWORK
摘要 <p>A method for selecting clock source in Synchronization Digital Hierarchy (SDH) network and a clock board are provided in the present invention. The method includes: a clock information message is generated based on the quality information of the clock in SDH, and the clock board of every network element in said SDH independently selects clock source by using said clock information message. The method and clock board for selecting clock source in SDH provided in the present invention enable automatic reverse and recovery for clock source, effectively resolve the problem of clock looping, and adequately maintain the compatibility with the current system without increasing the cost of the system.</p>
申请公布号 WO2010148622(A1) 申请公布日期 2010.12.29
申请号 WO2009CN76310 申请日期 2009.12.31
申请人 ZTE CORPORATION;GAO, RUI 发明人 GAO, RUI
分类号 H04L7/00 主分类号 H04L7/00
代理机构 代理人
主权项
地址