CMOSFET STRUCTURE FOR CONTROLLING THRESHOLD VOLTAGE OF DEVICE AND MAKING METHOD THEREOF

摘要

A CMOSFET structure is provided, which can control the threshold voltage of the device by a stacked gate structure. The CMOSFET structure includes a silicon substrate (1001), SiO2 interfacial layers (1003a, 1003b) grown on the silicon substrate (1001), first high-k gate dielectric layers (1004a, 1004b) deposited on the SiO2 interfacial layers (1003a, 1003b), ultra thin metal layers (1005a, 1005b) deposited on the first high-k gate dielectric layers (1004a, 1004b), second high-k gate dielectric layers (1006a, 1006b) deposited on the ultra thin metal layers (1005a, 1005b), and metal gate layers (1007a, 1007b) deposited on the second high-k gate dielectric layers (1006a, 1006b). The ultra thin metal layers (1005a, 1005b), which are deposited in the high-k gate dielectric layers of the NMOS and PMOS devices respectively, can induce positive or negative charges in the high-k gate dielectric layers to adjust the flat-band voltage of the device, so that the threshold voltage of the device can be controlled. The interface dipoles between the high-k gate dielectric layers and the SiO2 interfacial layers can be enhanced, the type and quantity of the fixed charges in the high-k gate dielectric layer can be controlled, and the threshold voltage of the device can be controlled effectively. The method for making the CMOSFET structure is also provided.