SYSTEM AND METHOD FOR PROVIDING CONFIGURABLE LATENCY AND/OR DENSITY IN MEMORY DEVICES

摘要

Memory devices (10), memory controllers (20), methods, and systems are provided, such as methods for masking the row cycle latency time of a memory array (22). In one embodiment, a memory device (10) that is configurable to operate in full or reduced density modes is provided. In a reduced density mode, certain banks within the memory array (22) function as duplicate memory banks associated with an addressable memory bank. Write operations (140) performed in the reduced density mode may write a data segment to an addressed memory bank as well as its associated duplicate banks. When repeated read requests (160) are issued for the data segment, the read requests (160) may be interleaved between the addressed bank and its duplicate banks, thereby masking the row cycle time of each physical bank. That is, the interval between each read out of the data segment from the memory array (22) will appear to be less than the row cycle time.