发明名称 Reuse of circuit labels for verification of circuit recognition
摘要 A method for identifying instances of a smaller circuit in a larger circuit is provided. Both the smaller circuit and the larger circuit have a plurality of vertices. A vertex is one of a device or a net. The device, such a transistor, includes a Gate, a Drain, and a Source. The net is a wired connection between devices. The method includes recursively relabeling of each of the plurality of vertices until labels of all neighboring vertices of a selected vertex are zero. The neighboring vertices of a vertex are vertices that are directly connected to the vertex. Each successive iteration of the relabeling uses labels of each of the plurality of vertices after a previous iteration of the relabeling. Then, a recursive circuit tracing operation is performed.
申请公布号 US7861193(B2) 申请公布日期 2010.12.28
申请号 US20080035405 申请日期 2008.02.21
申请人 ORACLE AMERICA, INC. 发明人 MESERVE DOUGLAS C.
分类号 G06F17/50 主分类号 G06F17/50
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