| 摘要 |
A method of verifying a design of logic circuit of a semiconductor device having a first circuit block to which the power continuously applied and a second circuit block receiving the power which turns on/off in response to the state of operation modes includes replacing a first basic logic cell including a storage element to a first verification logic cell in the blocks, replacing a second basic logic cell having no storage cell to a second verification logic cell in the blocks, and performing a logical simulation of the device.
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