发明名称 Multivalued logic circuit
摘要 In a bridge adder circuit, a first and a second complementary pair of current mirrors is connected between the input terminals and a positive and a negative supply voltage bus, respectively, to control a first and a second push-pull output stage. The outputs of the push-pull output stages are connected to the respective inputs through first resistors and to a common output node through second resistors. As a result, a universal circuit element for a multivalued logic element, such as ternary logic or 5-valued logic is provided.
申请公布号 US7859312(B2) 申请公布日期 2010.12.28
申请号 US20080598669 申请日期 2008.04.30
申请人 VIRTUAL PRO INC. 发明人 OLEXENKO VIKTOR VIKTOROVICH
分类号 H03K19/094 主分类号 H03K19/094
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