| 摘要 |
<p>PURPOSE: A scavenging metal stack for a high-k gate dielectric is provided to reduce the thickness of a silicon oxide interface layer under a high-k dielectric. CONSTITUTION: A semiconductor substrate(8) includes a semiconductor material. A gate dielectric includes a high dielectric constant, which is high-k, dielectric layer which has a dielectric constant greater than 7.5. The gate dielectric is located on the semiconductor substrate. A lower metal layer is adjacent to the gate dielectric. The semiconductor substrate includes a substrate semiconductor layer(10) and a shallow trench isolation structures(12). The semiconductor material can be chosen among silicon, germanium, silicon-germanium alloy, silicon carbon alloy, silicon-germanium-carbon alloy, gallium arsenide, indium arsenide, indium phosphide, and so on.</p> |
