发明名称 SINGLE-BIT ADDER
摘要 FIELD: physics. ^ SUBSTANCE: device has 14 p-type conductivity field-effect transistors, 14 n-type conductivity field-effect transistors, inputs for terms A and B, a carry input CIN, high and low level voltage power leads, a first inverter whose output is the carry signal output COUT of a second inverter, whose output is the output of the summation result S. ^ EFFECT: faster generation of the carry signal owing to less capacitive loads in the circuit for transmitting the signal from the carry input CIN to the output of the summation result S. ^ 1 dwg, 1 tbl
申请公布号 RU2408058(C2) 申请公布日期 2010.12.27
申请号 RU20090110685 申请日期 2009.03.23
申请人 SHUBIN VLADIMIR VLADIMIROVICH 发明人 SHUBIN VLADIMIR VLADIMIROVICH
分类号 G06F7/50 主分类号 G06F7/50
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