发明名称 MULTIPLEXING AUXILIARY PE AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a multiplexing auxiliary PE (Processing Element) and a semiconductor integrated circuit, allowing reduction of a circuit area by reducing the number of used PEs, and allowing efficient use of the PEs. <P>SOLUTION: This multiplexing auxiliary PE receives signals from a plurality of upstream PEs 11-16 provided on an input side, supplies the signals from the upstream PEs to a multiplied and used multiplexing PE 3 to make the multiplexing perform prescribed processing, receives an already processed signal performed with the prescribed processing by the multiplexing PE, and sequentially supplies the already processed signal to a plurality of downstream PEs 41-43 provided on an output side. Operation of the plurality of upstream PEs and the supply of the already processed signal to the plurality of corresponding downstream PEs are synchronously performed by setting of the multiplexing auxiliary PE, some of the plurality of upstream PEs are a plurality of pairs of the PEs, the multiplexing PE is made to perform the prescribed processing to the signals from each pair of the upstream PEs, and the already processed signal of each pair is supplied to the downstream PE corresponding to the each pair of the upstream PEs. <P>COPYRIGHT: (C)2011,JPO&INPIT</p>
申请公布号 JP2010287122(A) 申请公布日期 2010.12.24
申请号 JP20090141495 申请日期 2009.06.12
申请人 FUJITSU SEMICONDUCTOR LTD 发明人 TABARU TSUGUCHIKA
分类号 G06F15/80 主分类号 G06F15/80
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