| 摘要 |
An integrated circuit and a standard cell of an integrated circuit, having a master-slave flip-flop, having a comparator logic at whose inputs the input signal of the master-slave flip-flop, the inverted input signal of the master-slave flip-flop, the output signal of the master-slave flip-flop, and the inverted output signal of the master-slave flip-flops are present, wherein the master-slave flip-flop has a master flip-flop and a slave flip-flop, wherein the slave flip-flop has a first inverting element and a second inverting element. Whereby for feedback, an output of the first inverting element is connected to an input of the second inverting element and an output of the second inverting element to an input of the first inverting element. Wherein, to output the output signal and the inverted output signal of the master-slave flip-flop, it is possible to connect the output and the input of the second inverting element to the inputs of the comparator logic so that the second inverting element and the comparator logic and an inverter form an exclusive-OR operation of the standard cell.
|
