发明名称 BINARY ARITHMETIC CODER
摘要 An object of the present invention is to provide a binary arithmetic coding device that allows real-time processing with a higher image quality. At a timing at which a ternary data string for a target bit is outputted, an updated coding range width and an updated range width of less probability are outputted. For that reason, while a binary conversion unit (32) and an f value retention processor (33) convert the ternary data string into a binary data string to output a coded bit, a binary arithmetic re-normalization unit (31) is allowed to perform a processing of binary arithmetic coding for the next bit.
申请公布号 EP2190122(A4) 申请公布日期 2010.12.22
申请号 EP20080792561 申请日期 2008.08.20
申请人 NTT ELECTRONICS CORPORATION 发明人 KASUYA, SHIGERU;NAGAI, NORIHIKO
分类号 H03M7/40;H04N19/00;H04N19/102;H04N19/134;H04N19/136;H04N19/192;H04N19/196;H04N19/85;H04N19/91 主分类号 H03M7/40
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