发明名称 SEMICONDUCTOR MEMORY DEVICE AND OUTPUT ENABLE SIGNAL GENERATING METHOD
摘要 PURPOSE: A semiconductor memory device and a method for generating an output enable signal are provided to minimize power consumption of an output enable signal generating circuit by controlling the operation of an output enable signal generating circuit in an active operation section. CONSTITUTION: A delay locked loop(330) detects a phase difference between an external clock signal and a feedback clock signal. The delay locked loop generates a DLL clock signal by delaying the external clock corresponding to a delay control signal. A delay unit(310) outputs an active signal as an output enable reset signal in response to a delay control signal. An output enable signal generator(350) is reset in response to the output enable reset signal and generates an output enable signal by counting the external clock signal and a DLL clock signal.
申请公布号 KR20100133656(A) 申请公布日期 2010.12.22
申请号 KR20090052320 申请日期 2009.06.12
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, HYUNG SOO;KIM, YONG JU;HAN, SUNG WOO;SONG, HEE WOONG;OH, IC SU;HWANG, TAE JIN;CHOI, HAE RANG;LEE, JI WANG;JANG, JAE MIN;PARK, CHANG KUN
分类号 G11C7/20;G11C7/10;G11C8/00 主分类号 G11C7/20
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