发明名称 |
MEASUREMENT METHODOLOGY AND ARRAY STRUCTURE FOR STATISTICAL STRESS AND TEST OF RELIABILITY STRUCTURES |
摘要 |
PURPOSE: A measurement methodology and an array structure for statistical stress and the test of reliability structures are provided to give stress to a plurality of semiconductor devices at the same time and individually test them while maintaining the stress applied to the semiconductor devices which are not in test. CONSTITUTION: A control circuit is formed on a wafer and includes a switch configuration circuit(415). The switch configuration circuit responds to a control signal for operating switch elements. The switching configuration circuit transmits a signal to a transistor device at a predetermined time and a sustain time. A local signal generation circuit receives a plurality of digital signals and generates an additional local signal for selecting certain one of the transistor devices.
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申请公布号 |
KR20100133302(A) |
申请公布日期 |
2010.12.21 |
申请号 |
KR20100044534 |
申请日期 |
2010.05.12 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
AGARWAL KANAK BEHARI;MASSEY JOHN GREG;HABIB NAZMUL;HAYES JERRY D.;STRONG ALVIN WAYNE |
分类号 |
G01R31/26;H01L21/66 |
主分类号 |
G01R31/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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