| 摘要 |
In one embodiment a self-aligned vertical group III-V transistor comprises a group III-V layer having a first conductivity type formed over a group III-V drift body having a second conductivity type opposite the first conductivity type, a pinch-off region formed by dopant implantation of the group III-V layer. The pinch-off region is doped so as to have the second conductivity type, and extends through the group III-V layer to the group III-V drift body. The self-aligned vertical group III-V transistor also comprises a pinch-off insulation body formed over the pinch-off region, the pinch-off region and the pinch-off insulation body being self-aligned. In one embodiment, the present invention may take the form of a self-aligned vertical N-channel field-effect transistor (FET) in gallium nitride GaN.
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