发明名称 Method of Acquiring a Plurality of Logic Signals, with Confirmation of State Validity
摘要 A method of ACM acquisition/confirmation of a plurality of logic signals SI(i) combines a loop for the single confirmation processing for all the sampled signals, with a sequential sampling of these signals. On each sampling, the confirmation loop processes the current sampled signal SI(i), in order to decide on the updating of an output register Qs(i) with the current sampled state Sk, depending on whether or not it is confirmed, either that this state is not to be confirmed, or that this state is to be confirmed, and that the associated confirmation duration τ has elapsed. The confirmation loop uses a dating mechanism capable of supplying a current date used to supply the dates on which the logic state transitions are observed, and to allow measurements of the elapsed durations since these transition dates, and, for each processed signal, a parameter memory M-P(i), making it possible to program the confirmation of the associated signal as a function of criteria common to all the signals, and a status memory M-ST(i) which stores at least two items of information ST1 and ST2 corresponding respectively to the last state seen Sp for this signal and to the date of transition Dt into this state (ST2).
申请公布号 US2010315117(A1) 申请公布日期 2010.12.16
申请号 US20100815378 申请日期 2010.06.14
申请人 THALES 发明人 DERVIN PATRICK
分类号 H03K19/003 主分类号 H03K19/003
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