| 摘要 |
PROBLEM TO BE SOLVED: To provide a digital/analog converter generating an analog output signal having small distortion even in a high-speed conversion operation. SOLUTION: In a circuit configuration wherein digital input signals D<SB>0</SB>-D<SB>5</SB>of N bits, for instance, 6 bits are latched by D flip-flops D-FF<SB>0</SB>to D-FF<SB>5</SB>, and subjected to re-timing by a clock signal supplied from a clock buffer CB through a clock signal line to be outputted to current switch cells CS<SB>0</SB>to CS<SB>5</SB>through data signal lines, thereby currents supplied from current sources in accordance with the respective bit values are added in a resistance ladder circuit RL to be outputted as analog output, the resistance ladder circuit RL is arranged at the center, and the current switch cells CS<SB>0</SB>to CS<SB>5</SB>and the D flip-flops D-FF<SB>0</SB>to D-FF<SB>5</SB>are laterally-alternately arranged at laterally-symmetrical positions with respect to a center line connecting the center of the clock buffer CB and the center of the resistance ladder circuit RL in an order from a bit side having a smaller digit position. COPYRIGHT: (C)2011,JPO&INPIT
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