| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a Load Reduced memory module achieving a high data transfer rate. <P>SOLUTION: The memory module includes memory chips 200, data register buffers 300, and a command/address register buffer 400, mounted on a module board 110. The data register buffer 300 performs data transfer with the memory chips 200. The command/address register buffer 400 buffers a command/address signal, and generates a control signal. The buffered command/address signal is supplied to the memory chips 200, and the control signal is supplied to the data register buffers 300. Wiring distance between the data register buffers 300 and the memory chips 200 is reduced, to achieve a very high transfer rate. <P>COPYRIGHT: (C)2011,JPO&INPIT</p> |
