发明名称 |
STATISTICAL INTEGRATED CIRCUIT PACKAGE MODELING FOR ANALYSIS AT THE EARLY DESIGN PHASE |
摘要 |
In designing an integrated circuit on a die having a set of die bumps, a method to generate a set of lumped circuit parameter values associated with the set of die bumps, based upon distances between the set of die bumps and the center of the die, the method also based upon a sample-data distribution function of a die bump distance variable and a sample-data distribution function of a lumped circuit parameter variable. Other embodiments are described and claimed. |
申请公布号 |
WO2010144829(A1) |
申请公布日期 |
2010.12.16 |
申请号 |
WO2010US38351 |
申请日期 |
2010.06.11 |
申请人 |
QUALCOMM INCORPORATED;CHEN, XIAOMING;YAO, JACK, MONJAY |
发明人 |
CHEN, XIAOMING;YAO, JACK, MONJAY |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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