| 摘要 |
<p>Formation of high speed complementary metal oxide semiconductor (CMOS) process compatible tunneling devices are formed on low dielectric loss sheet- substrates (100), such as silicon or germanium for infrared or quartz and sapphire for visible or near infrared, having a first smooth planar surface (100-1 ) and a second smooth planar surface (100-2) and an intermediate surface (100-3) in the form of a hole, or slit, or a side edge, which extends between and connects the first and second surfaces, so that deposited from opposite sides of the sheet-substrate the first metal layer (101 ) followed by its oxidation or nanometer thickness tunneling dielectric coating (102) and the second metal layer (104) have an overlapped coupled area (104-2) within the intermediate surface, thus forming a non-planar metal-insulator-metal (MIM) tunneling junction of low capacitance and high cut-off frequency, which is capable to operate at room temperature at terahertz, infrared, and optical frequencies. The methods of preparation of the non-planar MIM tunneling devices and practical applicability for manufacturing the devices are for both reception and generation of terahertz, infrared, and optical radiation.</p> |
