| 摘要 |
A class D power amplifier includes: a signal input terminal for receiving an analog signal; an analog signal processing unit for amplifying the analog signal; an integrating circuit for integrating the analog signal received from analog signal processing unit; a PWM circuit for providing pulse width modulation to an integration signal received from the integrating circuit, and outputting a resulting pulse width modulation signal having a duty ratio falling within a first duty ratio range; a duty ratio adjusting circuit for adjusting the pulse width modulation signal, received from the PWM circuit, to have a pulse width falling within a second duty ratio range narrower than the first duty ratio range; a first driver and a second driver each for processing the pulse width modulation signal received from the duty ratio adjusting circuit; and power transistors.
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