发明名称 |
MEMORY SYSTEM AND COMPUTER SYSTEM |
摘要 |
PURPOSE: A memory system and a computer system are provided to reduce a defective rate which is allowable in a chip group while obtaining reliability of the memory system. CONSTITUTION: Memory chip groups(10a,10b) have a chip of n nonvolatile semiconductor memories respectively. A unit area of one of n chips memorizes an error correction code for a group including a unit area of (n-1) chips. The chip storing the error correction codes are different at all locations of unit areas. When data of the unit area is re-recorded, an access destination calculator designates a unit area storing the error correction code is designated as a record destination of re-recoded data.
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申请公布号 |
KR20100130546(A) |
申请公布日期 |
2010.12.13 |
申请号 |
KR20100016271 |
申请日期 |
2010.02.23 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
KONDO SHIGEO;NARUKE KIYOMI;SHIGYO NAOYUKI |
分类号 |
G06F12/16;G06F11/08;G06F13/10 |
主分类号 |
G06F12/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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