发明名称 SEMICONDUCTOR DEVICE
摘要 <p>The write disturbance margin of reference cells that generate reference current during reading is improved. The bit line (BL) forms a clad wiring structure (40) in the normal cell region (10N) where normal memory cells (NMC0-NMC2) are disposed and a partially- or non-clad wiring structure (42) in the reference cell region (10R) where the reference cell (RMC) is disposed. Thus, the write magnetic field intensity applied to the reference cell is smaller than the write magnetic field intensity applied to a normal memory cell during identical write currents.</p>
申请公布号 WO2010137125(A1) 申请公布日期 2010.12.02
申请号 WO2009JP59648 申请日期 2009.05.27
申请人 RENESAS ELECTRONICS CORPORATION;TSUJI, TAKAHARU;WATANABE, GENTA 发明人 TSUJI, TAKAHARU;WATANABE, GENTA
分类号 H01L21/8246;G11C11/15;H01L27/105;H01L43/08 主分类号 H01L21/8246
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