发明名称 DIELECTRIC-ISOLATION-TYPE SEMICONDUCTOR INTEGRATED DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a dielectric-isolation-type semiconductor integrated device capable of coexisting with a minute MOS element and having a high withstand voltage, and to provide a method of manufacturing the integrated device. SOLUTION: In this dielectric-isolation-type semiconductor integrated device 10 to which an SOI substrate composed of a support substrate 5, an embedded silicon oxide film 6, and an active layer 15 composed of a first high-concentration impurity layer 9 and a low-impurity concentration layer is applied, an element isolation region formed by surrounding a high-withstand-voltage semiconductor element formation region is formed by including multiple grooves 100, first oxide films 105 formed on sidewalls of the multiple grooves, second high-concentration impurity layers 110 formed along the multiple groove sidewalls adjacently to the first oxide films, a low-resistance layer P2 arranged through an LOCOS oxide film 50 generally above the second high-concentration impurity layers, and second oxide films 70, 75, 80 laminated on the low-resistance layer; the low-resistance layer has potential nearly identical to that of the second high-concentration impurity layer or a drain electrode; and an emitter electrode is extracted from the high-withstand-voltage semiconductor element formation region to an adjacent region on the surface of the second oxide film. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2010272672(A) 申请公布日期 2010.12.02
申请号 JP20090122911 申请日期 2009.05.21
申请人 HITACHI LTD 发明人 WATANABE TOKUO
分类号 H01L29/786;H01L21/76;H01L21/762;H01L21/8234;H01L27/04;H01L27/08;H01L27/088;H01L29/06;H01L29/739;H01L29/78 主分类号 H01L29/786
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