| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device for simultaneously achieving reduction in size of a resistance element, and improvement in latch-up resistance of a field effect transistor (FET), and also provide a method of manufacturing the same semiconductor device. SOLUTION: A shallow trench isolation (STI) 12 is formed in an N-type well resistance element forming region of a silicon substrate 11. Next, a donor diffusing region 21 is formed by doping donor in a P-type MOS transistor forming region. Next, an N-type well 14 is formed in the region just under the STI 12 in the N-type well resistance element forming region, and a donor diffusing region 20 is also formed in a P-type MOS transistor forming region by doping the donor in the N-type well resistance element forming region and the P-type MOS transistor forming region. The donor diffusing regions 21 and 20 are stacked to form an N-type well 19 constituting a channel region of the P-type MOS transistor 7. In this case, impurity to form an N-type well 14 and the donor diffusing region 20 is less doped than the impurity to form the donor diffusing region 21. COPYRIGHT: (C)2011,JPO&INPIT
|
