发明名称 GUARANTEED PREFETCH INSTRUCTION
摘要 A microprocessor includes a cache memory, an instruction set having first and second prefetch instructions each configured to instruct the microprocessor to prefetch a cache line of data from a system memory into the cache memory, and a memory subsystem configured to execute the first and second prefetch instructions. For the first prefetch instruction the memory subsystem is configured to forego prefetching the cache line of data from the system memory into the cache memory in response to a predetermined set of conditions. For the second prefetch instruction the memory subsystem is configured to complete prefetching the cache line of data from the system memory into the cache memory in response to the predetermined set of conditions.
申请公布号 US2010306503(A1) 申请公布日期 2010.12.02
申请号 US20100781337 申请日期 2010.05.17
申请人 VIA TECHNOLOGIES, INC. 发明人 HENRY G. GLENN;EDDY COLIN;HOOKER RODNEY E.
分类号 G06F9/30;G06F9/312;G06F12/08 主分类号 G06F9/30
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