发明名称 |
Area-Efficient Electrically Erasable Programmable Memory Cell |
摘要 |
Electrically erasable programmable “read-only” memory (EEPROM) cells in an integrated circuit, and formed by a single polysilicon level. The EEPROM cell consists of a coupling capacitor and a combined read transistor and tunneling capacitor. The capacitance of the coupling capacitor is much larger than that of the tunneling capacitor. In one embodiment, field oxide isolation structures isolate the devices from one another; a lightly-doped region at the source of the read transistor improves breakdown voltage performance. In another embodiment, trench isolation structures and a buried oxide layer surround the well regions at which the coupling capacitor and combined read transistor and tunneling capacitor are formed.
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申请公布号 |
US2010302854(A1) |
申请公布日期 |
2010.12.02 |
申请号 |
US20090474444 |
申请日期 |
2009.05.29 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
WU XIAOJU;MITROS JOZEF CZESLAW |
分类号 |
G11C16/04;G11C11/34;H01L21/336;H01L27/115 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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