发明名称 A/D CONVERSION INTEGRATED CIRCUIT
摘要 <p>Disclosed is an A/D conversion integrated circuit which includes a plurality of A/D converters capable of reducing the propagation of noise caused by capacitive coupling from conductors transmitting digital signals. At each A/D converter (13), an input (15) receives an analog signal (SA) to be converted from analog to digital. An output (17) provides at least part of a digital signal (SD) of a predetermined number of bits representing the analog signal (SA). A sub A/D conversion circuit (19) receives the analog signal (SA) and generates a signal (SDP) representing one or a plurality of bit values among the digital signal (SD), and provides the signal (SDP) to the output (17). An input (21a) of a control circuit (21) is connected to an output (19a) of the sub A/D conversion circuit (19), and provides the control signal (SCONT) corresponding to the signal (SDP). The control signal (SCONT) comprises a waveform including the transition from the voltage level L1 to the voltage level L2, and the transition from the voltage level L2 to the voltage level L1.</p>
申请公布号 WO2010137660(A1) 申请公布日期 2010.12.02
申请号 WO2010JP59022 申请日期 2010.05.27
申请人 NATIONAL UNIVERSITY CORPORATION SHIZUOKA UNIVERSITY;KAWAHITO SHOJI 发明人 KAWAHITO SHOJI
分类号 H03M1/40;H03M1/08 主分类号 H03M1/40
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