SINGLE GATE INVERTER NANOWIRE MESH

摘要

PURPOSE: A single gate inverter nanowire mesh is provided to reduce the layout footprint of an inverter by forming a source/drain area aligning with the gate using damascene gate process. CONSTITUTION: A wafer(102) having SOI(silicon-on-insulator) layer(104) is arranged on a buried oxide layer(106). A sacrificial layer(107) epitaxially grows on the SOI layer. A Si layer(108) epitaxially grows on the sacrificial layer. An additional sacrificial layer(109) is formed on the top of the Si layer. An insulating layer(111) is formed on the sacrificial layer.