发明名称 |
Method of fabricating through-substrate vias and semiconductor chip prepared for being provided with a through-substrate via |
摘要 |
A method for manufacturing a through substrate via (75) in a semiconductor chip (11) comprises providing a substrate (5) with a FEOL (1), a BEOL (3) comprising a metal one layer (16), and a plurality of second contact plugs (50) provided at a location where the through substrate via (75) is to land. The plurality of second contact plugs (50) are provided through a pre-metal dielectric (13) extending up to an underlying isolation zone (14) and contact and electrically connect the metal one layer (16). The substrate (5) is thinned, thereafter providing a through substrate via hole (60) through the substrate (5), which does not extend up to the metal one layer (16) of the BEOL (3). Then the through substrate via hole (60) is filled with conductive material such that electrical contact with the metal one layer (16) is realised via the plurality of second contact plugs (50). |
申请公布号 |
EP2255386(A1) |
申请公布日期 |
2010.12.01 |
申请号 |
EP20090721429 |
申请日期 |
2009.03.12 |
申请人 |
IMEC |
发明人 |
SABUNCUOGLU TEZCAN, DENIZ;CIVALE, YANN;SWINNEN, BART;BEYNE, ERIC |
分类号 |
H01L21/768;H01L23/48 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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